APB UART 16550

Overview

The IPC-UART is a 16450/16550 compatible Universal Asynchronous Receiver/Transmitter (UART). The core contains a baud rate generator that can be configured to generate a wide range of baud rates depending on the system clock frequency and the programmable divisor. The core contains two 16 byte internal FIFOs for receive and transmit characters. The core also implements the standard 16550 modem control signaling. DTS, RTS, etc. The core can transfer parallel data via two direct memory access modes and has a loopback mode for on chip diagnostics.

Key Features

  • 16450/16550 Compatible
  • 16 byte transmit FIFO
  • 16 byte receive FIFO
  • Modem control
  • Programmable baud rate generator
  • Prioritized interrupt system
  • Line status and error checking
  • 2 Direct Memory Access Modes
  • Loopback Mode
  • AMBA APB interface

Block Diagram

APB UART 16550 Block Diagram

Deliverables

  • Verilog Source
  • Complete Test Environment
  • APB Bus Functional Model
  • C-Sample Code

Technical Specifications

Maturity
Silicon Proven
Availability
Now
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Semiconductor IP