AMBA LPI Verification IP

Overview

AMBA LPI Verification IP provides a smart way to verify the AMBA LPI component of a SOC or an ASIC. The SmartDV's AMBA LPI Verification IP is fully compliant with standard AMBA LPI Specification. Our AMBA LPI VIP is proved across multiple customers.

AMBA LPI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA LPI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

Compliant to ARM AMBA LPI protocol
Supports LPI Controller, LPI Device, LPI Monitor and LPI Checker.
LPI support

LPI Q-Channel interface, P-Channel interface operations.
Handshake mechanism in Q-Channel and P-Channel
Entry and exit request to a quiescent state.
Configurable Active and Deny interfaces

Programmable Timeout insertion.
On-the-fly protocol checking.
Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
Built in coverage analysis.
Callbacks in controller, device and monitor for various events.
Status counters for various events on bus.
AMBA LPI Verification IP comes with complete testsuite to test every feature of ARM AMBA LPI specification

Benefits

Faster testbench development and more complete verification of AMBA LPI designs.
Easy to use command interface simplifies testbench control and configuration of master and slave.
Simplifies results analysis.
Runs in every major simulation environment.

Block Diagram

Deliverables

Complete regression suite containing all the AMBA LPI testcases.
Examples showing how to connect various components, and usage of BFM and Monitor.
Detailed documentation of all class, task and function's used in verification env.
Documentation also contains User's Guide and Release notes.

Technical Specifications

Request Info