250Mbps to 8.1Gbps Multi-protocol SerDes PMA, wire-bond

Overview

The wide-range 250Mbps to 8.1Gbps 2-lane SerDes macro includes all high-speed analog/mixed-signal functions including PCS, Loopback, DFT and Calibration for two lanes of high-speed data transport between chips over FR4 and similar PCBs/backplanes and over quality cables. Macro is optimized for low power operation and is suitable for a variety of communication protocols. Trimmable on-die termination, linear equalization (CTLE) and Decision Feedback Equalizer are included to compensate for channel loss enabling longer cables. An Eye Monitor is included to verify the eye opening at the data slicer.

Key Features

Layout for wirebond packaging
Very wide CDR range -- operates with data rates from 0.125Gbps to 10.3125Gbps
Extremely low jitter suitable for Enterprise SerDes applications
Compatible with OIF-CEI-6G SR/MR/LR, JESD204A/B/C, CPRI1-6, PCIe1/2/3, OTN (OTU1), SMPTE SDI, XAUI, SGMII, V-by-One, (e)DP (RBR/HBR/HBR2/3)
Two lanes sharing bias to save area and power may be placed any number of times
Programmable receiver equalization and 5-tap DFE to improve signal integrity and compensate for lossy channels
Flexible line driver with highly programmable levels and 3-tap FFE for pre- and post-emphasis
Trimmable on-die termination for excellent signal integrity
Comprehensive power-down control to optimize power modes
Wire-bond packaging

Block Diagram

Applications

Programmable devices needing to support multiple different protocols with a single IP instance
AFE-FPGA interfaces
SATA interfaces
UHD-TV (8k TV) displays
PC graphics cards / monitors, mobile devices, notebooks (DisplayPort)
MFPs
Scanners
Semi-custom chip-chip interfaces
SGMII for Automotive

Deliverables

GDSII
CDL Netlist
Functional Verilog Model (.v)
Liberty timing model (.lib)
LEF
Application Note with integration and production test guidelines
Signal integrity simulations using customer package models

Technical Specifications

Foundry, Node

TSMC 40nm, 90nm

Maturity

Mass Production

Availability

Now

TSMC

In Production: 40nm LP
Pre-Silicon: 40nm LP

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