Ins and outs of SS Link Training in USB3.0
March 24, 2015
As you may know, USB3.0 has a state machine called LTSSM (Link training and status state machine) which is responsible for
- Initialization and link training
- Power management transitions
- Link error recovery and other connectivity issues.
LTSSM has 12 high level states as shown below. In this blog, we will examine the states that are involved in link training, and see how link partners moves to state U0 where actual transfers begin.
Related Semiconductor IP
- USB3.0 build-in clock PHY, SMIC 110g
- USB3.0 build-in clock PHY, SMIC 55LL
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- USB3.0 build-in clock PHY, HLMC 40LP, type-C
- USB3.0 build-in clock PHY, UMC 40LP, type-C
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