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DDR3 Controller IP

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Compare 32 DDR3 Controller IP from 11 vendors (1 - 10)
  • DDR3 Controller
    • Maximizes bus efficiency via look-ahead command processing, bank management, auto-precharge and additive latency support
    • Latency minimized via parameterized pipelining
    • Achieves high clock rates with minimal routing constraints
    • Supports full-rate and half-rate clock operation
    • Multi-mode controller support
    Block Diagram -- DDR3 Controller
  • DDR2 & DDR3 Fault Tolerant Memory Controller
    • Configurable to have multiple AHB ports with concurrent accesses to different memory banks
    • 96-, 64- or 32-bits interface towards SDRAM
    Block Diagram -- DDR2 & DDR3 Fault Tolerant Memory Controller
  • DDR3 Monitor Verification IP
    • Supports DDR3 memory devices from all leading vendors
    • Quickly validates the implementation of the DDR3 standard
    • Constantly monitors DDR3 behavior during simulation
    • Checks for following
    Block Diagram -- DDR3 Monitor Verification IP
  • GDDR3 Synthesizable Transactor
    • Supports 100% of GDDR3 protocol standard
    • Supports all the GDDR3 commands as per the specs
    • Supports all types of timing and protocol violation detection
    • Supports all mode registers programming
    Block Diagram -- GDDR3 Synthesizable Transactor
  • DDR3 DFI Synthesizable Transactor
    • Compliant with DFI version 2.0 or higher Specifications.
    • DFI-DDR3 Applies to :
    • DDR3 protocol standard JESD79-3F Specification
    • Supports all the Interface Groups.
    Block Diagram -- DDR3 DFI Synthesizable Transactor
  • DDR3L Synthesizable Transactor
    • Supports 100% of DDR3L protocol standard 8Gb DDR3L.pdf
    • Supports all the DDR3L commands as per the specs
    • Supports up to 8 GB device density
    • Supports 8 internal banks
    Block Diagram -- DDR3L Synthesizable Transactor
  • DDR3 3DS Synthesizable Transactor
    • Supports 100% of DDR3 3DS protocol standard JESD79-3-3
    • Supports all the DDR3 3DS commands as per the specs
    • Supports up to 64GB device density
    • Supports 64 internal banks
    Block Diagram -- DDR3 3DS Synthesizable Transactor
  • DDR3 Synthesizable Transactor
    • Supports 100% of DDR3 protocol standard JESD79-3F
    • Supports all the DDR3 commands as per the specs
    • Supports up to 8 GB device density:
    • Supports following devices:
    Block Diagram -- DDR3 Synthesizable Transactor
  • DDR3 DFI Verification IP
    • Compliant with DFI version 2.0 or higher Specifications.
    • DFI-DDR3 Applies to :
    • DDR3 protocol standard JESD79-3F Specification
    • Supports all the Interface Groups.
    Block Diagram -- DDR3 DFI Verification IP
  • DDR3L Memory Model
    • Supports DDR3L memory devices from all leading vendors.
    • Supports 100% of DDR3L protocol standard 8Gb_DDR3L.pdf.
    • Supports all the DDR3L commands as per the specs.
    • Supports up to 8 GB device density.
    Block Diagram -- DDR3L Memory Model
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