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Ethernet PHY IP

Welcome to the ultimate Ethernet PHY IP hub! Explore our vast directory of Ethernet PHY IP

The Ethernet PHY IP cores encode data frames for transmission and decode received frames with a specific modulation speed of operation, transmission media type and supported link length.

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Search (58)
Compare 58 Ethernet PHY IP from 14 vendors (1 - 10)
  • Silicon Proven 1G Ethernet PHY IP as Whitebox
    • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
    • IEEE 1588-2008 support
    • BroadR-Reach™ support
    • Dual port MAC interface:
    Block Diagram -- Silicon Proven 1G Ethernet PHY IP as Whitebox
  • Ethernet 10/100 PHY
    • Supports MII.
    • Auto-MDX
    • 10/100Mbs operation supported
    • Full/half duplex operation
    Block Diagram -- Ethernet 10/100 PHY
  • 10/100/1000 base T ethernet Phy
    • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
    • IEEE 1588-2008 support
    • BroadR-Reach™ support
    • Dual port MAC interface:
    Block Diagram -- 10/100/1000 base T ethernet Phy
  • 224G Ethernet PHY, TSMC N3P x1, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 224Gbps data rates
    • Enables 200G, 400G, 800G, and 1.6T Ethernet
    • Ethernet interconnects for wired network infrastructure
    • Supports IEEE 802.3 and OIF-224G standards electrical specifications
    Block Diagram -- 224G Ethernet PHY, TSMC N3P x1, North/South (vertical) poly orientation
  • 224G Ethernet PHY, TSMC N2P x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 224Gbps data rates
    • Enables 200G, 400G, 800G, and 1.6T Ethernet
    • Ethernet interconnects for wired network infrastructure
    • Supports IEEE 802.3 and OIF-224G standards electrical specifications
    Block Diagram -- 224G Ethernet PHY, TSMC N2P x4, North/South (vertical) poly orientation
  • 224G Ethernet PHY, Intel 18A x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 224Gbps data rates
    • Enables 200G, 400G, 800G, and 1.6T Ethernet
    • Ethernet interconnects for wired network infrastructure
    • Supports IEEE 802.3 and OIF-224G standards electrical specifications
    Block Diagram -- 224G Ethernet PHY, Intel 18A x4, North/South (vertical) poly orientation
  • 112G PHY, TSMC N7 x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G PHY, TSMC N7 x4, North/South (vertical) poly orientation
  • 112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientation
  • 112G Ethernet PHY, TSMC N7 x2, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G Ethernet PHY, TSMC N7 x2, North/South (vertical) poly orientation
  • 112G Ethernet PHY, TSMC N7 x1, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G Ethernet PHY, TSMC N7 x1, North/South (vertical) poly orientation
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