GDDR IP for TSMC
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GDDR IP
for TSMC
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GDDR6 PHY IP for 12nm
- JEDEC JESD250 compliant GDDR6 support
- X16 mode, X8 mode, and pseudo-channel mode
- Low frequency RDQS mode support
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GDDR7 PHY
- Highest performance at 36Gbp/s
- Fully hardened timing-closed PHY
- Available in multiple advanced-process nodes
- PAM3 signaling or NRZ
- 4 independent channels
- PHY independent mode
- Microcontroller or state machine training
- Low-power clock gating
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GDDR6 PHY
- Single configuration supports one GDDR6 device per channel (coplanar) or two GDDR6 devices per channel (clamshell)
- DFI PHY Independent Mode for initialization and training
- Adaptive and continuous timing recovery
- Internal and external datapath loop-back modes
- Transmit crosstalk cancelation of immediate neighbors
- Per-bit DFE, CTLE, and FFE equalization
