Forward Error Correction IP for TSMC
Welcome to the ultimate Forward Error Correction IP for TSMC hub! Explore our vast directory of Forward Error Correction IP for TSMC
All offers in
Forward Error Correction IP
for TSMC
Filter
Compare
3
Forward Error Correction IP
for TSMC
from 3 vendors
(1
-
3)
-
VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs
- Complete DisplayPort™ 1.4 Receiver solution with support for VESA Display Stream Compression (DSC)
-
AR4JA LDPC Decoder
- AR4JA LDPC code family is quasi-cyclic.
- Irregular parity check matrix.
-
ASIC IP-core for very-high-throughput decoding (>20G) of 3GPP 5G Release 15
- Portable to all ASIC and FPGA technologies