Serdes IP for SMIC
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26
Serdes IP
for SMIC
from 6 vendors
(1
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10)
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PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 28HKMG
- Compatible with PCIe base Specification
- Full compatible with PIPE4.2 interface specification
- Independent channel power down control
- Implemented Receiver equalization Adaptive-CTLE to compensate insertion loss
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Low Power Multi-Rate SerDes
- Data rates of <200Mb/s to >8Gb/s
- Compatible with SGMII, SATA, FibreChannel, JESD 204, V-by-One
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1.25 Gbps SGMII SerDes
- Complies with Cisco Serial-GMII Specification revision 1.8
- 1.25Gbps (625MHz) operation
- LVDS I/O
- Jitter performance exceeds standard specification
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3.25 Gigabit SerDes
- 1.0 to 3.25 Gbps operation per channel
- 1.2V power supply, CMOS design
- Low power dissipation
- Minimal external components
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1.25 Gbps EPON SerDes IP
- IEEE 802.3ah compliant
- 1.25Gbps operation
- Jitter performance exceeds standard specification
- 1.2V power supply, CMOS design
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4.25 Gbps Quad Multistandard SerDes
- 1.0 to 4.25 Gbps operation per channel
- 1.2V/2.5V power supply, CMOS design
- Low power dissipation (80mW /channel at 3.2 Gbps)
- Minimal external components
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8G Multi-SerDes For PCIe3.0/USB3.0 PHY
- Reference Clock:
- Internal PLL:
- Data Transmit:
- Data Receive:
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5G Multi-SerDes For PCIe2.0/USB3.0 PHY
- Reference Clock:
- Internal PLL:
- Data Transmit:
- Data Receive:
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32G Multi-SerDes For PCIe5.0/USB3.x PHY
- Reference Clock:
- Internal PLL:
- Data Transmit:
- Data Receive:
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10G Multi-SerDes PHY
- Reference Clock:
- Internal PLL:
- Data Transmit:
- Data Receive: