Video-by-One Transmitter IP_8ch

Overview

Innosilicon VBO TX IP is designed for transmitting video data from a video source device to a display device. It is compatible with V-By-One HS 1.4 standard.
Innosilicon VBO TX IP consists of the digital controller and the physical layer. The digital controller contains 8 data process paths to deal with the received video data. Each path receives up to 40-bit video data, 24-bit control data and timing data with the pixel clock frequency from 20MHz to 600MHz. And each path consists of 3/4/5-byte packer, scrambler and 8b/10b encoder, and output 10-bit parallel encoded data to physical layer.
The physical layer contains 8 data lanes, PLL, and bias circuit. Each data lane consists of serializer and driver. The serializer converts the 10-bit parallel input data to 1-bit high speed serial stream and the driver converts the digital serial data to low swing differential signals with typical AC-coupled connection. The data rate is up to 4Gbps per lane. PLL generates the clocks required by 8 data transmitters and the digital controller. The bias circuit generates voltage and current reference.
Innosilicon VBO TX IP offers reliable implementation for VBO interface, which can be integrated in the SOC used in multimedia device.

Key Features

  • Area: 0.98mm2 (1400um x 700um) including IO and ESD
  • Compliant with V-By-One HS 1.4 standard
  • Support 1/2/4/8-lane configuration
  • Support 3/4/5-byte mode
  • Support data rate up to 4Gbps per lane
  • Support display resolution up to 4K/60Hz
  • Support programmable output swing, termination and pre-emphasis
  • Support BIST logic
  • Support SSC modulation
  • Typical 24MHz or 27MHz reference clock
  • APB slave interface for internal register access
  • Built-in low jitter PLL and bandgap reference

Benefits

  • Low power consumption
  • Fully customizable
  • Small area
  • Simple integration process
  • Available options include:
    • Test chips and test boards
    • FPGA integration support
    • Chip level integration support

Deliverables

  • Datasheet
  • Encrypted Verilog Model
  • Timing Library Model (LIB)
  • Library Exchange Format (LEF)
  • GDSII Database
  • Evaluation Board if Available

Technical Specifications

Foundry, Node
TSMC 55/40/12nm, GF 22nm
GLOBALFOUNDRIES
In Production: 22nm FDX
TSMC
In Production: 12nm , 40nm G , 40nm LP , 55nm LP
UMC
In Production: 40nm
Silicon Proven: 40nm
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Semiconductor IP