DDR5 IP for TSMC

Compare 8 DDR5 IP for TSMC from 2 vendors (1 - 8)

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DDR5 PHY - TSMC N3P
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time
DDR5 MRDIMM2 PHY - TSMC N3P
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time
DDR5 PHY - TSMC N3E
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time
HBM3 PHY V2 in TSMC (N5, N3E)
- Low latency, small area, low power
- Compatible with JEDEC standard HBM3 DRAMs
- Data rates up to 9600 Mbps
- 8H, 12H and 16H HBM3 DRAM stacks supported
HBM3 PHY V2 (Hard 1) in TSMC (N3E)
- Low latency, small area, low power
- Compatible with JEDEC standard HBM3 DRAMs
- Data rates up to 9600 Mbps
- 8H, 12H and 16H HBM3 DRAM stacks supported
DDR5 PHY in TSMC (N3E, N5)
- Low latency, small area, low power
- Compatible with JEDEC standard DDR5 SDRAMs up to 8400 Mbps
- Compatible with JEDEC standard DDR4 SDRAMs up to 3200 Mbps
- DFI 5.0 compliant interface to the memory controller
MCR DDR5 PHY
- Fully pre-assembled design, Drop-in hard macro to ease integration and speed time to market
DDR5/4 Combo PHY & Controller
- DDR5 and DDR4 modes & signaling, rates from 20Mbps up to 5200Mbps (DDR5) and 3200Mbps (DDR4), respectively
- x16/x32/x64/x72/x80 data path interface extendable, support UDIMM, RDIMM and LRDIMM
- 1.1V/1.2V JEDEC IO standard, supporting 1.1V POD_11 and 1.2V POD_12 I/Os
- Support DDR5 dual channel mode, dual 32bit data +8bit ECC