Frac-N PLL IP for TSMC

Compare 19 Frac-N PLL IP for TSMC from 7 vendors (1 - 10)

Ultra-low Jitter Fractional-N Frequency Synthesizer PLL (5nm - 180nm)
- Jitter-Power optimized to meet PCIe1-5 reference clock requirements - replaces 300mW/$2.50 clock chip
- Low area on chip -- keepouts = DRC limit in most cases
4.4 GHz To 7.75 GHz Low phase Noise Fractional-N Synthesizer
- Low Phase Noise, Low pin count
- Reference input: 81.25 MHz to 162.5 MHz
- Flavor 1 Output frequency range: 4.4 GHz to 6.4 GHz (3 VCOs needed)
- Flavor 2 Output frequency range: 6.87 GHz to 7.75 GHz (2 VCOs needed)
Integrated Droop Response System
- Observable
- Tightly Coupled
- Process Portable
Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply
Fractional-N PLL Widely Programmable
- Up to 2.2GHz output frequency
- Better than 100Hz output frequency resolution
- Standard differential sine output (Buffered multiple phase clock output as option)
- Deep N-Well isolated design for increased noise isolation
SSCG PLL - TSMC CLN3P
Core Powered Wide Range PLL - TSMC CLN3P
SSCG PLL - TSMC CLN3E
Core Powered Frac-N SSCG PLL - TSMC CLN3A
Integer/FracN/SSCG PLL - TSMC 12FFC