This is an IP core for the ISP (Image Signal Processor) that processes image data input from the image sensor.
Image Signal Processor IP Core
Overview
Key Features
- Compatible with Bayer filters on image sensors
- Implementable on both ASIC and FPGA
- Input/output I/F conforms to AMBA
- Maximum image size: 4K x 2K pixels
- Supports RGB, YCbCr formats (No sensor correction)
- Equipped with the following functions
- Sensor correction：Black level correction , Demosaic , Color correction
- Automatic correction：AWB(Auto White Balance) , AE (Auto Exposure)
- Image correction: Tone curve correction, Gamma correction Color space conversion
Block Diagram
Video
The customizable compact ISP-IP Core
This is an ISP-IP core that consolidates our image processing technology. It can be installed in FPGA or ASIC. Even for devices with limited circuit size, it can be achieved small size by implementing only the necessary functions in this ISP. First, we confirm the functions and peripheral design details required by the customer, and then customize our ISP-IP core to include only the appropriate functions. Since our ISP-IP core is equipped with the minimum necessary functions, it reduces the load on the CPU that performs some solutions and it realizes low power consumption of image processing system, for instance, ”AI processing of images" etc.
Applications
- Security camera
- Monitoring camera
- Appearance inspection camera
Technical Specifications
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