Digital Blocks DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE Verilog RTL IP Core accepts AXI4-Stream data and control input, converts the control TID to a AXI4 Memory Map address, and signals a DMA Controller to read the data by way of a AXI4 Slave Memory Map read channel.
The Digital Blocks DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE IP Core works with Digital Blocks DMA Controller (i.e. the DB-DMAC-MC-AXI Verilog RTL IP Core) to transfer data from an AXI4-Stream peripheral or AXI4-Stream Network Interface to either memory or another peripheral.
DMA AXI4-Stream Interface to AXI Memory Map Address Space
Overview
Key Features
- Converts AXI4-Stream Interface to AXI4/AXI3 Memory Map Data & Control Interface
- Standard release supports 16 AXI4-Stream Channels.
- More or less Channels optional. Contact Digital Blocks with requirements.
- Works with Digital Blocks DMA Controller to support following data transfers:
- Peripheral-to-Memory
- Peripheral-to-Peripheral
- Network-to-Memory
- Network-to-Peripheral
- Individual Interface Data Widths: 8 / 16 / 32 / 64 / 128 / 256 / 512 / 1024.
- Interrupt Controller – for Diagnostics
Deliverables
- Verilog RTL Source or technology-specific netlist.
- Comprehensive testbench suite with expected results.
- Synthesis scripts.
- Installation & Implementation Guide.
- Technical Reference Manual.
Technical Specifications
Foundry, Node
TSMC, GlobalFoundaries, UMC, Samsung, SMIC, Intel, Tower Jazz, Powerchip
Maturity
Successful in Customer Implementations
Availability
Immediately
Related IPs
- DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
- DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
- AXI4 Memory Map to AXI4-Stream Bridge
- AXI / AHB / APB - SPI Flash Memory Controller - Octal/Quad/Dual/Single SPI I/O - CPU access to Flash and optional Execute-in-Place (XIP), Boot, DMA
- Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC
- PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface