DDR5 PHY IP

Compare 482 DDR5 PHY IP from 17 vendors (1 - 10)

TSMC CLN4P 4nm DDR5 PHY - 6400Mbps
- Supports DDR5
- DFI 5.1 compliant
- Supports x4, x8 and x16 DRAMs
- Up to 72 bits wide and up to 4 ranks
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
- Compliant for JEDEC standards for LPDDR5X/5/4X/4 with PHY standards
- DFI 5.1 specification PHY Interface Compliant
- Support up to 4 ranks
- x16 and x32 channel support
LPDDR5X/5/4X/4 combo PHY at 7nm
- Unbeatable performance-driven and low-power-driven PPA
- Ultra-low read/write latency with programmable PHY boundary timing
- Channel equalization with FFE and DFE
GDDR6 Memory Controller IP
- JEDEC GDDR6 standard JESD250B
- Fast frequency switching
- Flexible Configuration
LPDDR5X/5/4X/4 PHY IP for 12nm
- Compliant with JEDEC standards for LPDDR5X/5/4X/4 with PHY standards
- DFI 5.0 Interface Compliant
- Supports up to 4 ranks
- Multiple frequency states
GDDR6 PHY IP for 12nm
- JEDEC JESD250 compliant GDDR6 support
- X16 mode, X8 mode, and pseudo-channel mode
- Low frequency RDQS mode support
DDR5/4 PHY for Samsung
- Lowest latency for data-intensive applications
- Highest data rates with detailed system guidelines
GDDR6 PHY for Samsung
- Derived from Cadence’s silicon-proven DDR, LPDDR, and high-speed SerDes designs
- Highest data rates with detailed system guidelines
Secure Digital I/O offerings
- Secure Digital
- Physical Features
DDR5/4 PHY - LRDIMM Add-On
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time