PLL IP for TSMC

Compare 811 PLL IP for TSMC from 28 vendors (1 - 10)

General-purpose & Specialized Ring PLLs + RTL-based Solutions
- Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
- Input & output frequency ranges greater than 1000:1
Analog-PLL For Spread Spectrum Clock
- TSMC 28nm HPM/HPC
- Including Loop-filter
- VCO operating range : 900MHz - 1800 MHz
Analog PLL For Frequency Multiplying
- Including Loop-filter
- VCO operating range : 2500MHz - 5000 MHz
- Output frequency range : 1250MHz - 2500 MHz
Analog-PLL For Frequency Multiplying
- Process: TSMC 28nm HPM/HPC
- Available metalization technologies: 4X2Y2R and 5X2Y2R
High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
Fractional-N PLL for Performance Computing in TSMC N6/N7
- Frequencies up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
4.4 GHz To 7.75 GHz Low phase Noise Fractional-N Synthesizer
- Low Phase Noise, Low pin count
- Reference input: 81.25 MHz to 162.5 MHz
- Flavor 1 Output frequency range: 4.4 GHz to 6.4 GHz (3 VCOs needed)
- Flavor 2 Output frequency range: 6.87 GHz to 7.75 GHz (2 VCOs needed)