TSMC plans 3-D IC assembly launch early in 2013
Peter Clarke, EETimes
2/2/2012 8:32 AM EST
LONDON – Leading IC foundry Taiwan Semiconductor Manufacturing Co. Ltd. plans to announce 3-D IC assembly service as a general offering at the beginning of 2013, according to Maria Marced, president of TSMC Europe.
The technology is called COWOS internally, standing for chip on wafer on substrate and Marced said the company has one year to get all physical design kits and EDA support in place to allow customers to design with COWOS.
To read the full article, click here
Related Semiconductor IP
- USB 2.0 femtoPHY -TSMC N6 18 x1, OTG, North/South (vertical) poly orientation
- USB 2.0 femtoPHY - TSMC N5 12 x1, North/South (vertical) poly orientation
- USB 2.0 femtoPHY - TSMC N3P 1.2V x1, North/South (vertical) poly orientation
- USB 2.0 picoPHY - TSMC 90LPFS33 x1, OTG
- USB 2.0 femtoPHY - TSMC 7FF18 x1, OTG, North/South (vertical) poly orientation
Related News
- proteanTecs Joins TSMC 3DFabric™ Alliance, Expanding Its Support of the 3D IC Ecosystem
- TSMC Announces Breakthrough Set to Redefine the Future of 3D IC
- GUC Announces 2.5D and 3D Multi-Die APT Platform for AI, HPC, Networking ASICs
- Siemens automates 2.5D and 3D IC design-for-test with new Tessent Multi die solution
Latest News
- How hardware-assisted verification (HAV) transforms EDA workflows
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology