NEC Corporation Adopts Aldec ALINT for Communication Systems LSI Design
Tokyo, Japan – November 25, 2013 – Aldec, Inc., the leading provider of design creation and verification solutions for semiconductor industry, announced today that NEC Corporation (NEC) has adopted on Aldec’s design rule checking solution, ALINT™, for RTL review and validation process in their corporate development flow for communication system designs.
"We compared the functions of ALINT with the conventional tool using LSI designs for our communication systems and found out that ALINT was more user-friendly and delivered solid performance,” stated Katsuhisa Ikeuchi, Assistant Manager, NEC Network Platform Development Division, “The adoption of ALINT in our flow will contribute to a reduction of turnaround time and improved quality of LSI designs for our communication systems."
Tsuyoshi Kato, Assistant Manager, NEC Network Platform Development Division added, “In addition to improved performance and usability, ALINT enables our design engineers to execute linting within a Windows® environment, which is important for our engineers using multiple design platforms.”
“We are pleased that NEC has recognized ALINT for its friendly user interface, as we have invested heavily in making it as efficient and straightforward as possible,” said Dmitry Melnik, ALINT Product Manager, “The attention to detail, high performance, and debugging capabilities that ALINT delivers will contribute to the development of highly reliable communications equipment supplied by NEC."
About Aldec
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
Related Semiconductor IP
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
Related News
- Aldec Adds RMM Library and FPGA Primitive Support to ALINT
- Aldec adds Documentation for Safety-Critical Designs in ALINT 2012.01
- Aldec launches ALINT-PRO-CDC delivering comprehensive CDC Verification Strategies for SoC and FPGA Designs
- Aldec Adds Customizable Tool Qualification Data Package to ALINT-PRO for DO-254 Projects
Latest News
- ASICLAND Partners with Daegu Metropolitan City to Advance Demonstration and Commercialization of Korean AI Semiconductors
- SEALSQ and Lattice Collaborate to Deliver Unified TPM-FPGA Architecture for Post-Quantum Security
- SEMIFIVE Partners with Niobium to Develop FHE Accelerator, Driving U.S. Market Expansion
- TASKING Delivers Advanced Worst-Case Timing Coupling Analysis and Mitigation for Multicore Designs
- Efficient Computer Raises $60 Million to Advance Energy-Efficient General-Purpose Processors for AI