Camera Interface IP for UMC
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Camera Interface IP
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Camera Interface IP
for UMC
from 2 vendors
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Camera sub-LVDS/mini-LVDS/LVDS/HiSPi(SLVS-400, HiVCM)/MIPI-DPHY/CMOS 6-7mode Combo-Receiver 1.5Gbps
- MIPI DPHY v1-1/MIPI CSI/TIA/EIA-644 LVDS/SLVS-400 compliant
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Wide-range LVDS Video Interface
- Wide pixel clock range: 9MHz to 190MHz (VGA to HDTV and QXGA at 60fps) = 60Mb/s to 1.33Gb/s (proven beyond 2Gb/s) -- far exceeding range of discrete interfaces
- Compatible with 18bit, 24bit, and 30bit balanced and unbalanced pixel data
- 2.5V or 3.3V I/O voltage operation
- Input levels compatible with EIA/TIA-644 LVDS, subLVDS, and larger amplitude OpenLDI standards
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Wide-range LVDS Video Interface
- Wide pixel clock range: 9MHz to 190MHz (VGA to HDTV and QXGA at 60fps) = 60Mb/s to 1.33Gb/s (proven beyond 2Gb/s)
- Compatible with 18bit, 24bit, and 30bit balanced and unbalanced pixel data
- 2.5V or 3.3V I/O voltage operation
- Programmable output levels compatible with EIA/TIA-644 LVDS, subLVDS, and larger amplitude OpenLDI standards