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MIPI D-PHY IP for Samsung

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Compare 11 MIPI D-PHY IP for Samsung from 4 vendors (1 - 10)
  • MIPI D-PHY Transmitter/Receiver for DSI/CSI-2 Samsung 28nm FD-SOI
    • 4 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of Samsung 28nm FD-SOI process
    Block Diagram -- MIPI D-PHY Transmitter/Receiver for DSI/CSI-2 Samsung 28nm FD-SOI
  • MIPI D-PHY TRx 28nm
    • Samsung Foundry 5nm low power enhanced (LN28LPP) CMOS device technology
    • 1.8V±5%, 1.2V±5%,1V±5% power supply
    • Fully supports MIPI D-PHY v1.2 HS/LP/ULPS Tx/Rx (Backward Compatible with previous versions)
    • Supports 80-2100Mbps in D-PHY HS mode
    Block Diagram -- MIPI D-PHY TRx 28nm
  • MIPI D-PHY TRx 5nm
    • Samsung Foundry 5nm low power enhanced (LN11LPP) CMOS device technology
    • 1.8V±5%, 1.2V±5%, 0.8/0.9V±5% power supply
    Block Diagram -- MIPI D-PHY TRx 5nm
  • MIPI D-PHY TRx 14nm
    • Samsung Foundry 5nm low power enhanced (LN14LPP/LPU) CMOS device technology
    • 1.8V±5%, 1.2V±5%, 0.8/0.9V±5% power supply
    • Fully supports MIPI D-PHY v1.2 HS/LP/ULPS Tx/Rx (Backward Compatible with previous versions)
    • Supports 80-2100Mbps in D-PHY HS mode
    Block Diagram -- MIPI D-PHY TRx 14nm
  • MIPI D-PHY TRx 8nm
    • Samsung Foundry 5nm low power enhanced (8LPU) CMOS device technology
    • 1.8V±5%, 1.2V±5%, 0.75/0.85V±5% power supply
    • Fully supports MIPI D-PHY v2.0 HS/LP/ILPS Tx/Rx (Backward Compatible with previous versions)
    • Supports 80-400Mbps in D-PHY HS mode
    Block Diagram -- MIPI D-PHY TRx 8nm
  • MIPI D-PHY DSI TX IP
    • Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
    • Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
    • Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
  • MIPI D-PHY_4.5G CSI-2 RX IP
    • Compliant with MIPI Alliance Standard for Camera Serial Interface 2 (CSI-2) V2.0
    • Compliant with MIPI Alliance Standard for D-PHY Specifications V2.0
    • Integrated PHY Protocol Interface (PPI) interfaces to CSI-2 and UniPro™ MIPI® protocols
    • HS, LP and ULPS modes supported
  • MIPI D-PHY TX
    • Analog mixed-signal hard-macro HS/LP transmitter solution
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
    • Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
    • HS, LP, ULPS modes supported
  • MIPI C/D-PHY TX
    • Analog mixed-signal hard-macro HS/LP transmitter solution
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
    • Compliant with MIPI® Alliance Specification for C-PHY V1.1
    • Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
  • MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm)
    • Compliant with the MIPI D-PHY specification
    • Fully verified hard macro
    • Up to 2.5 Gb/s per lane
    • Aggregate throughput up to 10 Gb/s in 4 data lanes
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