USB 3.1 PHY IP for GLOBALFOUNDRIES

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Compare 4 USB 3.1 PHY IP for GLOBALFOUNDRIES from 2 vendors (1 - 4)
  • Complete USB Type-C Power Delivery IP
    • Mixed signal Analog Front End Macros for 65n, 130n, 150nm, and 180n technologies.
    • RTL code from AFE to I2C compatible register set.
    • Stand alone C code for Protocol, Device Policy Manager, and System Policy Manager.
    • IP demonstration & development board, with compliance reports. 
    • Full chip integration of USB Type-C, and associated software.
    Block Diagram -- Complete USB Type-C Power Delivery  IP
  • USB 3.1 PHY (10G/5G) - GF 22FD-SOI x1, North/South Poly Orientation
    • Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C 3.1 PHY IP supports USB Type-C specification
    • Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
    Block Diagram -- USB 3.1 PHY (10G/5G) - GF 22FD-SOI x1, North/South Poly Orientation
  • USB-C 3.1/DP TX PHY in GF (22nm)
    • Lowest risk: Based on proven USB 3.0 controller shipped in 100s of millions of units
    • Lowest power: Extend battery life in mobile devices (USB power saving modes, Uniform Power Format, hibernation option with dual power rails)
    • Configurable data buffering options to optimize performance vs area
    • Supports all USB speed modes
  • USB 3.1 PHY (10G/5G) in GF (22nm)
    • Lowest risk: Based on proven USB 3.0 controller shipped in 100s of millions of units
    • Lowest power: Extend battery life in mobile devices (USB power saving modes, Uniform Power Format, hibernation option with dual power rails)
    • Configurable data buffering options to optimize performance vs area
    • Supports all USB speed modes
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