USB4 Controller & Router IP

Overview

The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router, controllers, PHYs with support for the USB Type-C™ connectivity specification, and verification IP. These elements enable quick development of advanced chip designs incorporating the 20 Gbps and 40 Gbps USB4 standard.
The Synopsys USB4 IP is targeted for integration into SoCs for edge AI, mass storage devices, PCs, and tablets. The Synopsys USB4 PHY, Router and Controller IP allow designers to maximize power efficiency for extended battery life. The Synopsys USB4 IP enables the fastest USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a high- performance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.

Key Features

  • Lowest risk: Based on USB 3.2 controller that is proven in multiple designs
  • Lowest power: Reduce power consumption with USB power saving modes, Uniform Power Format, and hibernation option with dual power rails
  • Flexible data buffering options to optimize performance vs area
  • Supports all USB speed modes
  • Flexible controllers to meet the needs for all markets

Benefits

  • Supports USB4, USB 3.2, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors
  • and cables
  • Supports USB4 20Gbps and USB4 40Gbps
  • Supports USB 3.2 SuperSpeed and Enhanced SuperSpeed: Gen 1 at 5 Gbps, Gen 2 at 10 Gbps, and Gen 2x2 at 20 Gbps
  • Multi-lane operation for USB4 and USB 3.2 peripherals
  • Backwards compatible to previous Synopsys USB controllers to leverage existing drivers
  • USB4 PHYs, routers, and controllers offer high-performance throughput
  • USB4 router IP tunnels USB, PCIe and DisplayPort protocol traffic while optimizing bandwidth
  • Supports PIPE and UTMI+ PHY interfaces
  • Architectural features reduce power consumption

Applications

  • Mass storage devices
  • Artificial intelligence edge devices
  • Display and docking applications
  • Cloud computing
  • Automotive applications

Deliverables

  • Synopsys coreConsultant tool for rapid RTL generation and synthesis
  • ASIC and FPGA synthesis, ATPG, DFT, power scripts
  • UVM Testbench in Packaged Verification Environment (PVE)
  • Comprehensive databook and integration guides

Technical Specifications

Maturity
Available on request
Availability
Available
×
Semiconductor IP