YorChip UniPHY™ Dual PHY is a flexible version of YorChip’s multi-protocol PHY which supports UCIe and BOW standards. The Dual PHY’s unique feature is support for standard 50V CDM chiplets at data rates of 4-16G as well as support for 250V ESD and standard packaging. It is possible to choose between the two options by use of an RDL layer. Details on back page.
Full IP deliverables and flexible licensing models available – MPW, Single and Multi-use.
YorChip UniPHY™ Dual PHY has built-in security and ID which can be used to secure the link data to its partner chiplet – solving an increasingly critical chiplet security problem.
YorChip UniPHY™ Dual PHY is designed for simple integration and supports low-cost organic substrates and for packaging in low costs Chip Scale Packages (CSP). Now customers can deploy and prototype their designs quickly using quick turn PCB’s and even go to production in a few weeks.
Low Power Dual PHY for UCIe low cost robust Chiplets
Overview
Key Features
- Support standard chiplet use for UCIe standard to 16G
- Supports Chip Scale Packaging with 250V ESD option
- Build in Security and Probe function for KGD
Benefits
- Customers can develop Chiplets and ASSP's
- Patented RDL programmable ESD selection enables both
- End customers can deploy in packaged form for fast time to market and low cost
- Supports Organic substrates for standard Chiplet use and Chip Scale Packaging for ASSP
- Redundancy option for improving KGD
Applications
- Chiplets and ASSP's for low cost solutions
Deliverables
- GDS2
- LEF
- IBIS
Technical Specifications
Foundry, Node
40, 22,16,12,7
Maturity
In design
Availability
Q4 2023
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