LDO voltage regulator (output voltage 1.8 V)

Overview

The voltage regulator consists of a differential amplifier which compares reference voltage with voltage from a feedback divider. It adjusts the impedance of a PMOS transistor for stabilization of output voltage at a set level.
Input voltage: 2.4...3.6 V
Output voltage: 1.8 V
Maximum load current: 10 mA
The block is fabricated on TSMC SiGe BiCMOS 0.18 um technology.

Key Features

  • TSMC BiCMOS SiGe 180 nm
  • Low drop out
  • Low current consumption
  • Portable to other technologies (upon request)

Applications

  • Supply voltage sensitive circuits

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
TSMC BiCMOS SiGe 180 nm
Maturity
Silicon proven
Availability
Now
TSMC
Silicon Proven: 180nm
×
Semiconductor IP