JESD204B Serializer
Overview
The Silicon Creations serializer accepts four channels of 40-bit words at 40MHz to 185MHz from the link layer in single-ended CMOS and converts these words to a 1.60Gbps to 7.4Gbps serial data stream.
Key Features
- Data rates of 1.6Gbps to 7.4Gbps per lane for up 29.6Gbps aggregate
- Supports a single reference clock from 40MHz to 740MHz
- JESD204B compatible with OIF-CEI 2.0 LV-OIF-6G-SR AC compliance
- Shared common block includes TxPLL and bandgap reference
- Instantiates IO pads from TSMC 50m pitch Analog IO library
- AC common mode compliance
- 40bit datapath for easy SP&R of link layer
- 1-4 lanes can be activated
- Channel-channel data alignment exceeding JESD204B requirements
Deliverables
- GDSII
- CDL Netlist (MG Calibre Compatible)
- Functional Verilog Model
- Liberty timing models (.lib)
- LEF
- Application Note with integration and production test guidelines
Technical Specifications
Foundry, Node
TSMC 180nm
Maturity
Pre-silicon
Availability
Available Now
TSMC
Pre-Silicon:
180nm
E