I2C IP for TSMC

Compare 4 I2C IP for TSMC from 2 vendors (1 - 4)

Filter:

High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
TSMC 7nm (7FF) 3.3V SMBUS (I2C) IO
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
TSMC 7nm (7FF) 1.8V LVDS
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
TSMC 7nm (7FF) 3.3V GPIO
- Supports 1.8V/2.5V/3.3V mixed-voltage-tolerant/failsafe output buffer
- Fully programmable output driver strengths, input Schmitt trigger, and output slew rate
- Supports circuit-under-pad (CUP), non-CUP-inline and staggered-bond pad placement
- Supports retention and bus-keeper feature