UCIe IP for TSMC
Welcome to the ultimate UCIe IP for TSMC hub! Explore our vast directory of UCIe IP for TSMC
All offers in
UCIe IP
for TSMC
Filter
Compare
13
UCIe IP
for TSMC
from 5 vendors
(1
-
10)
-
UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Emerging Standard Knowledge
- Flexibly Configurable
- Best in Class PPA
-
2-16Gbps Multi-Protocol IO Supporting BOW, OHBI and UCIe
- Efficiency
- Composability
- Programmability
-
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
- Data rates up to 16Gbps per pin
- Self-contained hard macro
- Self-calibrating and training
- Side band channel for initialization and parameter exchange
-
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
- Data rates up to 16Gbps per pin
- Self-contained hard macro
- Self-calibrating and training
- Side band channel for initialization and parameter exchange
-
Die-2-die interfaces for chiplets
- Analog I/Os
- ESD Power protection
- Ground pads
-
16G UCIe Standard PHY for TSMC 7nm
- 16Gbps per pin and supports 12/8/4Gbps subrates
- High bandwidth, ultra-low latency, superior power efficiency, and low-power modes
- BIST features ensure Known Good Die (KGD)
- Sideband for link management and robust training
-
16G UCIe Standard PHY for TSMC 3nm
- 16Gbps per pin and supports 12/8/4Gbps subrates
- High bandwidth, ultra-low latency, superior power efficiency, and low-power modes
-
16G UCIe Advanced PHY for TSMC 3nm
- 16Gbps per pin and supports 12/8/4Gbps subrates
- High bandwidth, ultra-low latency, superior power efficiency, and low-power modes
- BIST features ensure Known Good Die (KGD)
- Sideband for link management and robust training
-
UCIe PHY IP on TSMC N3P
- Data rates up to 16Gbps per pin
- Self-contained hard macro
- Self-calibrating and training
-
UCIe-S PHY for Standard Package (x32) in TSMC (N3P)
- Data rates up to 16Gbps per pin
- Self-contained hard macro
- Self-calibrating and training
- Side band channel for initialization and parameter exchange