Memory Controller & PHY IP for Samsung

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Compare 1 Memory Controller & PHY IP for Samsung from 1 vendors (1 - 1)
  • Samsung 8LPU 3.3V SD/eMMC PHY
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- Samsung 8LPU 3.3V SD/eMMC PHY
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Semiconductor IP