Standard Cell PowerSlash(TM) Library IP, 7 tracks, UMC 0.11um HS/FSG process
Overview
UMC 0.11um HS/FSG Logic process high density POWERSLASH (POWERSLASH) Core Cell Library.
Technical Specifications
Foundry, Node
UMC 110nm HS/FSG
UMC
Pre-Silicon:
110nm
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