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Power Management Subsystem

Overview

The agilePMU Subsystem is an efficient and highly integrated power management unit for SoCs/ASICs. Featuring a power-on-reset, multiple low drop-out regulators, and an associated reference generator. The agilePMU Subsystem is designed to ensure low power consumption while providing optimal power management capabilities.

Equipped with an integrated digital controller, the agilePMU Subsystem offers precise control over start-up and shutdown, supports supply sequencing, and allows for individual programmable output voltage for each LDO. Status monitors provide real-time feedback on the current state of the subsystem, ensuring optimal system performance.

Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Samsung Foundry, Intel, and SMIC as well as other IC foundries and manufacturers. Please contact Agile Analog for further information.

Key Features

  • agilePOR/BOR
    • Assertion Time: 5us (typ)
    • Configurable Trigger Thresholds
    • Programmable Delay
    • Current Consumption: 1.5uA (typ)
  • agileLDO
    • Output Voltage: Programmable
    • Load Current: User defined
    • Active Current: 1uA (typ)
    • Power Down Current: 10nA (typ)
    • PSSR: 40dB (@DC)
  • agilePMU Subsystem
    • Start-up Time: Typ 20us
    • Industry standard digital interface
    • Configurable logic to control sequencing and monitoring
    • Fully integrated macro
    • Standard AMBA APB interface

Block Diagram

Power Management Subsystem Block Diagram

Technical Specifications

GLOBALFOUNDRIES
Pre-Silicon: 12nm , 14nm , 14nm LPE , 14nm LPP , 20nm LPM , 22nm , 22nm FDX , 28nm , 28nm FDSOI , 28nm HPP , 28nm LPH , 28nm SLP , 32nm , 40nm LP , 55nm , 55nm LPX , 65nm , 65nm LP , 65nm LPe , 90nm , 90nm LP , 130nm , 130nm HP , 130nm LP , 130nm LV , 180nm , 180nm LL , 180nm LL , 180nm LP , 180nm LP
Intel Foundry
Pre-Silicon: 16nm
SMIC
Pre-Silicon: 14nm , 28nm , 28nm HK , 28nm HKC+ , 28nm PS , 40nm LL , 55nm G , 55nm LL , 65nm LL , 90nm G , 90nm LL , 110nm G , 130nm EEPROM , 130nm G , 130nm LL , 130nm LV , 150nm G , 150nm LV , 153nm , 160nm G , 160nm LL , 180nm EEPROM , 180nm G , 180nm LL , 250nm G
Samsung
Pre-Silicon: 4nm , 5nm , 7nm , 8nm , 10nm , 11nm , 14nm , 28nm FDS , 28nm LPH , 28nm LPP
TSMC
Pre-Silicon: 3nm , 4nm , 5nm , 6nm , 7nm , 10nm , 12nm , 16nm , 20nm , 22nm , 28nm , 28nm HP , 28nm HPC , 28nm HPCP , 28nm HPL , 28nm HPM , 28nm LP , 40nm G , 40nm LP , 45nm GS , 45nm LP , 55nm FL , 55nm G , 55nm GP , 55nm LP , 55nm NF , 55nm ULP , 55nm ULPEF , 55nm UP , 65nm G , 65nm GP , 65nm LP , 80nm , 80nm GT , 80nm HS , 85nm , 90nm FS , 90nm FT , 90nm G , 90nm GOD , 90nm GT , 90nm LP , 90nm zzz , 110nm G , 110nm HV , 110nm LVP , 130nm , 130nm BCD , 130nm BCD+ , 130nm G , 130nm LP , 130nm LV , 130nm LVOD , 150nm G , 150nm LV , 160nm G , 160nm LP , 180nm , 180nm E , 180nm ELL , 180nm FG , 180nm G , 180nm LP , 180nm LV , 180nm ULL
Tower
Pre-Silicon: 130nm , 180nm , 180nm , 180nm , 500nm
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