Legacy Formats Decoder IP
Overview
Allegro DVT’s AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AVC 1920x1080i@60fps. The AL-D105 has been silicon proven in mutiple STB and DTV chipsets.
Key Features
- Supported standards :
- H.264/AVC CBP/MP/HP up to 1920x1080i@60fps
- H.264/MVC up to 1920x1080p@30fps each eye
- MPEG-4.2 SP/ASP
- MPEG-2 MP/HL
- VC-1/WM9 SP/MP/AP
- MP4 (DivX 3.11, H.263, Sorenson Spark)
- AVS, AVS+
- Real Media RV8/RV9/RV10
- Google VP6 / VP8
- JPEG / MJPEG Baseline up to 150 MPxl/s
- Interfaces :
- AMBA APB interface for CPU programming
- AMBA AXI interface for data access
Benefits
- Multi-stream and Multi-format
- Mature IP silicon proven in multiple mass production STB and DTV SoCs down to 28nm
- PES or ES stream input
- High latency tolerance (CPU & Memory)
- Low CPU load
- Low Memory Bandwidth
- Robust Error Resilience controlled by control software
- Production verified control software
- Extensively verified with a large library of third party test streams
Applications
- Smartphones, Tablets
- Camera SoCs
- Automotive
- Set-Top Boxes, Digital TV
- Wireless displays
- VR/AR headsets
Deliverables
- RTL source code
- C control software
- Bit accurate executable software reference model
- Documentation
Technical Specifications
Foundry, Node
28nm, 16nm and below
Availability
Available
Related IPs
- FEC RS (198,194) Decoder IP
- BCH Encoder and Decoder IP Core
- Block Viterbi Decoder
- Turbo Decoder
- Dynamic Block Reed-Solomon Decoder
- APB Fundamental Peripheral IP, Serial Interface controller for multiple frame formats, SSP (by TI), SPI (by Motorola), Microwire (by NS), I2S (by Philips), AC - link (by Intel) and SPDIF (by Intel), Soft IP