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32-bit Basic Application Processor

Overview

The BA22-AP is a 32-bit processor for demanding embedded applications that use off-chip instruction and data memories and that may need to run a real-time operating system (RTOS) or a full operating system such as Linux or Android. Part of the royalty-free BA22 family, this processor core is extremely competitive in terms of high performance and low power consumption, and has best-in-class code density.

The core has Instruction and Data Memory Management Units (MMUs) and Caches, optional dedicated buses for tightly coupled on-chip Instruction and Data memories, and an AMBA® AHB™, AXI-4™ or Wishbone system bus interface. Its base version includes 32 general-purpose registers (GPRs), a tick-timer (TTimer), a programmable interrupt controller (PIC), an advanced power management unit (PMU), and optionally a debug unit (DBGU). The core’s processing capabilities can be enhanced further with the optional hardware Multiply-Accumulate (MAC), IEEE 754 compliant floating-point, and DSP instructions acceleration units. Its interrupt response time can also be optimized with the addition of a Vectored Interrupt controller (VIC).

The BA22-AP supports the variable instruction length BA2 instruction set, benefits from its extreme code density, and is binary compatible with other members of the BA2x processor family. Programing is facilitated with the included C/C++ tool chain, Eclipse IDE, architectural simulator, and ported C libraries. Advanced debugging capabilities and off-the-shelf development boards can further ease software development.

In a typical 28 nm technology, the BA22-AP synthesizes to 38,000 sq. um (or 55k gates, excluding Cache and MMU RAMs) and can be clocked at up to 1000 MHz. Performance is rated at 2.93 Coremarks/MHz.

Additional microcontroller peripherals may be ordered for pre-integration and delivery with the core, individually or in a complete platform. IP Integration Services are also available to help integrate any BA22 processor configuration with memory controllers, image compression, or other CAST IP cores.

Part of the royalty-free BA2x family, the BA22-AP processor core has been designed for easy reuse and integration, has been rigorously verified, and is production proven.

Key Features

  • High Performance 32-bit CPU
  • 2.93 CoreMarks/MHz
  • Single-cycle instruction execution on most instructions
  • Fast and precise internal interrupt response
  • Hardware Multiply Unit
  • Optional hardware divide, multiply-accumulate, DSP instructions acceleration, and floating point units
  • Low Power Consumption
  • Industry-leading code density minimizes instruction memory area & power
  • From 38,000 sq. um (or 55K gates) in 28nm technology excluding SRAMs for caches and MMUs.
  • Fast & Flexible Memory Access
  • Harvard-style Caches and MMU separate for Instructions and Data
  • Tightly coupled Quick Memory (QMEM) for fast and deterministic access to code and/or data
  • Memory Management Unit for virtual memory support
  • Efficient Power Management
  • Dynamic clock gating and power shut-off of unused units
  • Software- and hardware-controlled clock frequency
  • Wake-up on tick timer or external interrupt
  • Advanced Debug Capability
  • Non-intrusive debug/trace for both CPU and system
  • Complex chained watchpoint and breakpoint conditions
  • Standard JTAG, and proprietary Two-Wire Debug interfaces
  • Integrated Peripherals
  • Base configuration includes a 32 bits-wide tick timer and a programmable interrupt controller
  • Optionally pre-integrated with AMBA bus infrastructure, Vectored interrupt controller, DMAs, GPIOs, UARTS, Timers, SPI, I2C, memory controllers and other IP cores from CAST.
  • Easy Software Development
  • Complete IDE integrating GNU-based cross-compiling toolchain
  • Ported libraries, tools and OSs

Block Diagram

32-bit Basic Application Processor Block Diagram

Applications

  • Mixed signal embedded processing
  • Portable and wireless
  • Internet, networking and telecom
  • Automotive
  • Home entertainment consumer electronics

Deliverables

  • The core is available for ASICs in synthesizable Verilog source code or for FPGAs in optimized netlists.
  • It includes everything required for successful implementation: extensive documentation, a testbench, a sample SoC design, sample synthesis and simulation scripts, and the BeyondStudio™ Eclipse-based software development IDE for Windows and Linux.
  • Reference designs on FPGA boards are also available; contact CAST Sales for information.

Technical Specifications

Maturity
Production Proven
Availability
Now
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