PCI 2.x Bus Arbiter

Overview

Description: PCI 2.x Bus Arbiter

The Arbiter core is used to efficiently manage access to a PCI bus that is shared by several masters. Access to the PCI bus is automatically determined by the individual priorities of each master.

Key Features

  • Support for up to five PCI Bus Masters
  • Support for two Arbitration Schemes
  • Pure Rotation
  • Fair Rotation
  • Support for Bus Parking
  • Hidden Bus Arbitration
  • Interface with 33 MHz and 66 MHz PCI

Technical Specifications

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Semiconductor IP