UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library
Overview
UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library
Technical Specifications
Foundry, Node
UMC 55nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
55nm
Related IPs
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
- LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
- 40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
- UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library
- UMC 55nm eFlash/LVT Logic Process 7-track PowerSlash Kit cell library
- UMC 55nm eFlash/RVT Logic Process 7-track PowerSlash Kit cell library