RC Oscillator TSMC

Overview

The agileOSC RC is based on a traditional architecture which allows for the frequency to be trimmed to remove the effects of process variation. This can also be configured as a Free Running Clock (FRC) where a high accuracy clock is not required.

Key Features

  • Start-up Time: Typ 10us
  • Frequency Range: 20KHz – 100MHz
  • Accuracy (Calibrated) Max = ? 5%
  • Current Consumption1: Typ 100uA @ 10MHz
  • Configurable to your specification
  • Clean start-up
  • Trimmable frequency
  • Low power
  • Customisable design for simple SoC integration
  • Silicon Area – Please contact Agile Analog

Benefits

  • DFT - Incorporates analog monitor (test) outputs to facilitate ATE test and debug
  • On chip clock generator

Block Diagram

RC Oscillator TSMC Block Diagram

Applications

  • IoT, Security, Automotive, AI, SoCs, ASICs

Deliverables

  • Datasheet
  • Testing and Integration Guide
  • Verilog Models
  • Floorplan (LEF)
  • Timing models (LIB)
  • Netlist (CDL)
  • Layout (GDS)
  • Physical Verification Report
  • Design Report

Technical Specifications

Foundry, Node
GlobalFoundries
Maturity
Available on request
Availability
In Development
TSMC
Pre-Silicon: 3nm , 4nm , 5nm , 6nm , 7nm , 10nm , 12nm , 16nm , 20nm , 22nm , 28nm , 28nm HP , 28nm HPC , 28nm HPCP , 28nm HPL , 28nm HPM , 28nm LP , 40nm G , 40nm LP , 45nm GS , 45nm LP , 55nm FL , 55nm G , 55nm GP , 55nm LP , 55nm NF , 55nm ULP , 55nm ULPEF , 55nm UP , 65nm G , 65nm GP , 65nm LP , 80nm , 80nm GT , 80nm HS , 85nm , 90nm FS , 90nm FT , 90nm G , 90nm GOD , 90nm GT , 90nm LP , 90nm zzz , 110nm G , 110nm HV , 110nm LVP , 130nm , 130nm BCD , 130nm BCD+ , 130nm G , 130nm LP , 130nm LV , 130nm LVOD , 150nm G , 150nm LV , 160nm G , 160nm LP , 180nm , 180nm E , 180nm ELL , 180nm FG , 180nm G , 180nm LP , 180nm LV , 180nm ULL
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