Programmable 32-bit Watchdog Timer
Overview
CoreWatchdog is an APB slave that provides a means of recovering from software crashes. When enabled, the core will generate a soft reset if the microprocessor fails to refresh it on a regular basis. CoreWatchdog is based on a decrementing counter which can assert a reset signal if it is allowed to time out. The width of the decrementing counter can be configured as either 16- or 32-bits. Processor-accessible registers in CoreWatchdog provide a means to control and monitor the operation of the core.
Key Features
- Optimized for use with Cortex-M1, CoreMP7, and Core8051s
- Configurable 16-Bit or 32-Bit Timer
- Runs from the APB Clock (PCLK)
- Prescale Provides Clock Division by up to 1,024
- Supplied in SysBASIC Core Bundle