VeriSilicon GSMC 0.15um LP High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.15um LP Logic 1P7M Salicide 1.5/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bits lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon GSMC LP Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are embedded with the intention to enhance reliability.
GSMC 0.15umLP Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
Overview
Key Features
- Low Leakage
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
Technical Specifications
Foundry, Node
GSMC 0.15um LP
Maturity
Silicon Proven
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