8-10 bit DAC UMC
Overview
The agileDAC GP is a digital-to-analog converter that uses a traditional capacitive DAC architecture. The agileDAC uses its own internal reference voltage. The architecture can achieve up to 10-bit resolution at sample rates up to 16 Msps.
Key Features
- Resolution: 8b/10b,
- Sampling Rate (Fs): up to 16Msps
- Output Signal Bandwidth: Typ Fs/2
- Guaranteed monotonic
- SFDR1: Typ -60dBc
- INL: Max2 ±4LSB
- DNL: Max2 ±2LSB
- Conversion Time: Typ 2 cycles
- Quiescent current3 (Iq):Typ 250uA
- Customisable design for simple SoC integration
- Integrated Calibration Mode
- Silicon Area – Please contact Agile Analog
Benefits
- DFT/DFM
- - AMBA-APB Interface to simply test and operation
- - Built-in Trim and Calibration to facilitate process and/or manufacturing offsets to be adjusted
Block Diagram
Applications
- IoT, Security, Automotive, AI, SoCs, ASICs
Deliverables
- Datasheet
- Testing and Integration Guide
- Verilog Models
- Floorplan (LEF)
- Timing models (LIB)
- Netlist (CDL)
- Layout (GDS)
- Physical Verification Report
- Design Report
Technical Specifications
Foundry, Node
UMC
Maturity
Available on request
Availability
Now
UMC
Pre-Silicon:
14nm
,
22nm
,
28nm
,
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
,
40nm
,
40nm
LP
,
55nm
,
65nm
LL
,
65nm
LP
,
65nm
SP
,
80nm
,
90nm
G
,
90nm
LL
,
90nm
SP
,
110nm
,
130nm
,
150nm
,
162nm