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eMMC Controller IP

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Compare 11 eMMC Controller IP from 6 vendors (1 - 10)
  • eMMC 5.1 Host Controller
    • Compliant with eMMC Specification Version 5.0
    • Supports one of the following System/Host Interfaces: AHB, AXI or OCP
    Block Diagram -- eMMC 5.1 Host Controller
  • SD/eMMC Host Controller
    • Supports selection between SD and eMMC
    • Supports CRC7 and CRC16 generation and verification on Hardware
    • Supports multiple block transfer
    Block Diagram -- SD/eMMC Host Controller
  • SD/eMMC Lite Host Controller IP
    • Compliant with the SD 6.0, SDIO 4.10 and eMMC 5.1 specifications and earlier versions
    • Supports advanced eMMC features including HS400 mode and built-in CQE with priority sensitive scheduling algorithm for high performance
    • Low power features with power gating and multi-power rails
    • Supports the host controller interface (HCI) specification for SD ensuring the usability of standard software drivers with support for SDMA, ADMA2 and ADMA3 modes
    Block Diagram -- SD/eMMC Lite Host Controller IP
  • SD/eMMC Host Controller IP
    • Compliant with the SD 6.0, SDIO 4.10 and eMMC 5.1 specifications and earlier versions
    • Supports advanced eMMC features including HS400 mode and built-in CQE with priority sensitive scheduling algorithm for high performance
    • Low power features with power gating and multi-power rails
    • Supports the host controller interface (HCI) specification for SD ensuring the usability of standard software drivers with support for SDMA, ADMA2 and ADMA3 modes
    Block Diagram -- SD/eMMC Host Controller IP
  • SD/eMMC Crypto Host Controller
    • Compliant with the SD 6.0, SDIO 4.10 and eMMC 5.1 specifications and earlier versions
    • Supports advanced eMMC features including HS400 mode and built-in CQE with priority sensitive scheduling algorithm for high performance
    • Low power features with power gating and multi-power rails
    • Supports the host controller interface (HCI) specification for SD ensuring the usability of standard software drivers with support for SDMA, ADMA2 and ADMA3 modes
    Block Diagram -- SD/eMMC Crypto Host Controller
  • eMMC Device Controller
    • Compliant to the eMMC Electrical Standard 5.1A
    • Supports Backwards Compatible, High Speed SDR, High Speed DDR, HS200 and HS400 transfer modes
    • Host transfer rate of up to 400 MByte/s in HS400 mode
    Block Diagram -- eMMC Device Controller
  • eMMC 5.1 Device Controller
    • Compliant with eMMC 5.1 specification
    • Peak bandwidth of 3.2 Gbps or 400 MB/s
    • Additional Data Strobe signal for HS400 mode
  • Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC
    • Compliant with SD HCI specification
    • CQE capable of reordering task execution based on priority
    • Data prefetching for back to back tasks—further improves random IOPS
    • Low-power features with power gating and multi-power rails
  • eMMC 5.1 /SD-SDIO3.0 Host Controller & PHY
    • The Host controller supports:
    • The data is transferred using:
    • eMMC 5.1 features:
  • eMMC 4.5 Card Slave Controller
    • Compatible with eMMC/MMC specification 4.5.
    • Supports Dual Data Rate (DDR) data transfer.
    • Enhanced MMC features including Boot, Sleep Mode, Reliable Write, Multiple Partitions and Security.
    • Supports e2.MMC command set and HS200 mode for 200MByte/sec data rate.
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