eMMC IP

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Compare 26 eMMC IP from 8 vendors (1 - 10)
  • eMMC 5.1 Host Controller
    • Compliant with eMMC Specification Version 5.0
    • Supports one of the following System/Host Interfaces: AHB, AXI or OCP
    Block Diagram -- eMMC 5.1 Host Controller
  • eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS
    • Silicon proven, fully compliant core
    • Premier direct support from IP core designers
    • Easy-to-use industry standard test environment
    Block Diagram -- eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS
  • SD/eMMC Host Controller
    • Supports selection between SD and eMMC
    • Supports CRC7 and CRC16 generation and verification on Hardware
    • Supports multiple block transfer
    Block Diagram -- SD/eMMC Host Controller
  • eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-EW
    • • Suitable for Transmitter, Receiver, and Data Strobe pins
    • VCORE Pre driver voltage
    • VCCQ Post driver voltage
    • TJ Junction temperature
    Block Diagram -- eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-EW
  • M31 eMMC/SDIO at HLMC 28HKC+ Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at HLMC 28HKC+ Process
  • M31 eMMC/SDIO at TSMC 40LP Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at TSMC 40LP Process
  • M31 eMMC/SDIO at TSMC 28HPC+ Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at TSMC 28HPC+ Process
  • M31 eMMC/SDIO at TSMC 22ULP Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at TSMC 22ULP Process
  • M31 eMMC/SDIO at TSMC 22ULL Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at TSMC 22ULL Process
  • eMMC Device Controller
    • Compliant to the eMMC Electrical Standard 5.1A
    • Supports Backwards Compatible, High Speed SDR, High Speed DDR, HS200 and HS400 transfer modes
    • Host transfer rate of up to 400 MByte/s in HS400 mode
    Block Diagram -- eMMC Device Controller
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