Peripheral IP

Compare 886 Peripheral IP from 107 vendors (1 - 10)

xSPI - PSRAM Master
- SPI Protocol:
- AXI4 Slave
- AXI4 DMA Master
- AXI4 – LITE SLAVE
ONFI 5.0 PHY
- The PHY design supports the newly introduced NV-LPDDR4 mode along with SDR, NV_DDR, and NV_DDR2, NV_DDR3 mode.
xSPI NOR Flash controller
- Memory mapped access to the connected flash devices
- Continuous Burst transfer support
- Auto boot support
I3C Host Controller
- Compliant with MIPI I3C Specification V1.0
- Supports up to 12.5 MHz operation using Push-Pull.
ONFI Flash Controller
- AXI System Interface
- NAND Flash
Tessent Bus Monitor
- Full transaction and trace-level visibility of on-chip bus traffic
- Wide range of measurements, analytics statistics: Transactions, Bus cycles, latency, duration, beats, bus concurrency
- Supports AXI, ACE, ACE-lite
- Run-time configurable
PCIe 5.0 Controller with AMBA AXI interface
- Compliant with the PCI Express 5.0 rev. 0.7 (32 GT/s), 4.0 (16 GT/s), 3.1/3.0 (8 GT/s) and PIPE (8-, 16-, 32- and 64-bit) specifications
CCIX 1.1 Controller with AMBA AXI interface
- Controller IP for PCIe 5.0, 4.0, 3.1/3.0 Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations, with CCIX ESM Support and AMBA AXI Interconect User Interface
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
- Page Size – 2KB, 4KB, 8KB, 16KB
- Bank/chip select options
- Programmable timing
PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
- Supports the PCI-SIG Single-Root I/O Virtualization (SR-IOV) Specification