A/D Converter (ADC) IP for UMC
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A/D Converter (ADC) IP
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96
A/D Converter (ADC) IP
for UMC
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Dual 12-Bit 20 to 200MS/s 1.2V ADC, CMOS 90nm
- TSMC 90nm general purpose 1.2V CMOS process
- Single 1.2V supply
- 20 to 200 Mspls/s scalable sampling rate
- 0.5 Vp_diff input dynamic range
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10-Bit 100MS/s 1.8V 66mW ADC, CMOS 0.18µm
- UMC 180nm 1.8V CMOS process with MIM capacitors (optional)
- Single 1.8V supply
- up to 100 Mspls/s sampling rate
- 2Vpp_diff input dynamic range
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Digital Cell Library UMC
- Compact standard cell library targeting a wide range of foundries and processes
- Customized for low-power, ultra-low-leakage, high density or high-speed applications with choices of:
- Power Management library for low-power designs
- Timing models for customizable range of PVT
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12-bit SAR ADC UMC
- Resolution: 12 bits
- Sampling Rate (Fs) 1: Up to 64 MSPS
- Input Signal Bandwidth: Fs/2
- SINAD1: Typ 69 dB
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8-10 bit SAR ADC UMC
- Resolution: 8b, 10b
- Sampling Rate (Fs): 1 Msps to 20Msps
- Input Signal Bandwidth: Fs/2
- SINAD1: Typ 54dB
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12-bit single-ended SAR ADC
- Sample rate 200 kHz
- Unipolar, Single-ended input range: 0V to 1.2V
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Low power 9 bit cyclic ADC
- Low power consumption
- Insensitivity to power supply variations
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Extended Range Incremental Sigma Delta ADC
- Sample-rate up to 350 MS/s
- Sample-rate: 1 MSPS
- Power consumption: 16 mW
- Single-ended input
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SAR ADC
- Area: 0.135mm2 with IO and ESD
- Note: The area parameter is for reference only. Please refer to the final LEF file for the actual values.
- 10-bit resolution
- Up to 1MS/s sampling rate