Low Bandwidth PLL IP for SMIC
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Low Bandwidth PLL IP
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Low Bandwidth PLL IP
for SMIC
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Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
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32kHz Ultra-Fast-Lock IoT PLL
- Input frequency range includes 32.768kHz
- Output frequency range: <10MHz to >200MHz
- Ultra-fast start-up. Frequency calibration ensures Fout is within 2% in <1.4ms from cold start