Clock Generator PLL IP for Silterra
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Clock Generator PLL IP
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5
Clock Generator PLL IP
for Silterra
from 3 vendors
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5)
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Minimum-area low-power clocking PLL (1st Gen)
- - Super small: 220 x 230 microns!
- - Very low power: 36-mW
- - Broad frequency range: 2-GHz
- - Fast lock
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4-GHz Jitter-optimized low-power digital PLL
- - Jitter below 10-ps
- - Super small: 90 x 90 microns!
- - Very low power: 15-mW
- - Broad frequency range: 4-GHz
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SilTerra 0.18um 1.8V APLL
- Process: SilTerra 180nm ULL 1P6M process
- Supply voltage: 1.8v±10%
- Current: typical 2.6mA
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1.5-GHz Jitter-optimized low-power digital PLL
- Jitter below 20-ps
- Super small: 250 x 250 microns!
- Very low power: 36-mW
- Broad frequency range: 1.5-GHz
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20 to 300 MHz frequency synthesizer
- SilTerra CMOS 0.18 um
- 1V CMOS input logic signal
- Output current digital 3-bit adjustment (from 0.75 mA to 6.5 mA)
- 1.6 Gbps (DDR MODE) switching rates for transmitter