UFS Host IP

Overview

Key Features

• Supports high performance M-PHY type-1.
• Supports full UFS Host functionality.
• Supports UFS driver layer over UniPro.
• Supports configurable cport.
• Supports Application Interface APB and AXI.
• Supports complete control of UIC Layer by UFS Host.
• Supports VIP interface at MPHY Serial, MPHY RMMI, Unipro CPort level.
• Supports UFS-Specified commands of Specification JESD220E.
• Supports Unified Memory Extension JESD220-1A(Version 1.1).
• All UPIU Processing
• o Datain, Dataout, Command, Response, RTT, Query, Task Management and Reject.
• Supports various UFS layers
• o UFS Command Set Layer (UCS)
• o UFS Transport Protocol Layer (UTP)
• o UFS Interconnect Layer (UIC).
• Includes MIPI UniPro and M-PHY VIP for UFS Interconnect Layer verification
• o MIPI UniPro is adopted for data link layer
• o MIPI M-PHY is adopted for physical layer
• o Proven MIPI UniPro BFM
• o Proven MIPI M-PHY BFM
• o Supports up to 2-lanes (restricted by Standard) running at HS-G4 (10 Gbps)
• o All PWM gears support
• o All HS gears support
• o Enter hibernate and exit hibernate supported
• o Complex LSS feature verification support to cover all cases, Like lane mapping, reverse lane mapping, errors in UPR sequences etc
• o All DME commands supported
• o Low power with multiple power operating mode
• o Various types of error injection at UniPro and MPHY layers
• o L1.5 and C port test mode features supported
• o Advanced L1.5, L2 and C port error injection
• o All L2 Preemption and error cases supported
• o Supports Unipro 1.41, Unipro 1.6 and Unipro 1.8 specifications
• o Support MIPI MPHY specification 3.0 and 4.1
• o Low power with multiple power operating modes.
• Supports boot mode operation.
• Supports device enumeration and discovery.
• Priority arbitration between command, query and task management UPIUs and Indexed based processing within Command and Query UPIUs.
• Supports 32 UTP Transfer request descriptors and 8 UTP Task Management Descriptors for UFS host.
• Supports Multiple partitions (LUNs) with partition Management.
• Supports Multiple User Data Partition with Enhanced User Data Area options.
• Supports for boot partitions and RPMB partition.
• Supports for Reliable write operation.
• Supports for Background operations.
• Supports for Secure operations, Purge and Erase to enhance data security.
• Supports for Write Protection options, including Permanent & Power-On Write Protection.
• Supports for Signed access to a Replay Protected Memory Block.
• Supports for HW Reset Signals.
• Supports Task management operations.
• Supports Power management operations.
• Supports automatic/user tag generation.
• Supports all Initiator ID values.
• Supports UFSHCI as per the specification JESD223C.
• Supports Priority LUN handling.
• Error injection and detection in all levels of UFS protocol.
• Notifies the testbench of significant events such as transactions, warnings,
• timing and protocol violations.
• Supports constraints Randomization.

Benefits

• Single Site license option is provided to companies designing in a single site.
• Multi Sites license option is provided to companies designing in multiple sites.
• Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
• Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

Deliverables

• The UFS Host interface is available in Source and netlist products.
• The Source product is delivered in verilog. If needed VHDL, SystemC code can also be provided.
• Easy to use Verilog Test Environment with Verilog Testcases.
• Lint, CDC, Synthesis and Simulation Scripts with waiver files.
• IP-XACT RDL generated address map.
• Firmware code and Linux driver package.
• Documentation contains User s Guide and Release notes.

Technical Specifications