Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
Overview
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compiler range up to 320 k
Key Features
- Reduced the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- Routing allowed upwards from Metal 4, Support Metal
- 5 top Metal option
- Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of Svt periphery
- Dynamic power reduction thanks to segment partitioning
- Flexible variable-write-mask feature for single-bit, byte or variable-word-size write-masking
- Make the integration easier
- Wide flexibility for words and bits per word
- Two Read/Write Ports which implements full Two-Port
- (1R/1W) functionality
- Flexible segment partitioning (Selectable 1-8 segments) allow the user to choose the best optimization between area, speed & power for his application
- Enable right on 1st pass design, the Dolphin integration quality
- Complete mismatch validation of the memory architecture taking in account local and global dispersion
- Extended validation for high coverage rate of the compiler
- Silicon proven per TSMC 9000 quality standard
- Decrease of Time-To-Market
- Multi foundries support using the same architecture
Technical Specifications
Maturity
In_Production
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