Smart Network-on-Chip (NoC) IP

Overview

Revolutionizing SoC Design with Intelligent Automation

FlexGen™ redefines how SoC designers create Network-on-Chip IP by introducing cutting-edge AI heuristics and machine learning. This revolutionary IP automates NoC topology generation, achieving up to 10x faster design iterations than traditional methods.

With FlexGen, teams can optimize wire length, reduce latency, and improve power efficiency while minimizing manual intervention. Designed for automotive, data centers, and industrial electronics applications, FlexGen shortens design cycles, enabling faster time-to-market and/or multiple design explorations for the most complex systems.

Efficient Transport of Data Through the SoC

Arteris CodaCache® last-level cache

  • Ideal for NoC applications with data re-use
  • Improves overall SoC latency and power

NoC Integration Automated Flow

Automated flow to leverage SoC connectivity information:

  • Improved productivity with reduced process
  • Better quality with early errors detections thanks to the checkers

Key Features

  • Smart NoC automation
  • Topology generation with minimum wire length
  • Scripting-driven regular topology creation
  • Incremental design capability
  • Auto-timing closure assist
  • … plus all the key features of FlexNoC 5

Benefits

  • Expert Level Output Quality: Generated smart NoC architecture and physical constraints
  • Significant Reductions in Wire Length: Minimizes die area, power consumption, and latency
  • 10x Productivity Improvement: Reducing setup and configuration time from days to hours or minutes by automating repetitive, time-intensive tasks
  • Higher Frequencies, Lower Latencies: Using built-in NoC performance analysis exploration tools
  • Speedy Timing Closure: Early physical awareness for faster convergence without re-designs
  • Automated Verification: Saving hundreds of hours of work versus manual verification test benches
  • Higher Profit: Reduced TTM from FlexGen design efficiency savings

Block Diagram

Smart Network-on-Chip (NoC) IP Block Diagram

Video

Arteris FlexGen Smart NoC IP Revolutionizes Complex SoC Designs

FlexGen from Arteris is a smart network-on-chip IP that revolutionizes complex for systems-on-chip designs. Supported by AI-driven automation, FlexGen enables the generation of optimized NoC topologies in hours instead of weeks, while maintaining the quality achieved through manual human methods. FlexGen dramatically accelerates chip development while optimizing performance efficiency, addressing the rising demand for faster, more sustainable innovation across applications in AI, automotive, datacenter, consumer electronics, communications and industrial/IoT. FlexGen delivers expert-level results while increasing productivity by 10x and reducing wire length by up to 30%. This innovation sets a new standard for faster time-to-market, optimized power plus performance, and improved overall design economics.

Technical Specifications

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Semiconductor IP