PCIe5 Ref Clock SSCG PLL - TSMC 6FF
Overview
Analog Bits’ PCIe Gen 5 Ref Clock SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Gen5 serial bus standard where SRIS (Separate RefClk Independent Spread-spectrum clock generation) is required. This SSCG PLL is designed for digital logic processes and uses robust design techniques to work in noisy SoC environments.
Technical Specifications
Foundry, Node
TSMC 6nm CLN6FF
TSMC
Pre-Silicon:
6nm
Related IPs
- IGAPLLV01A, TSMC CLN16FF+LL Spread Spectrum Clock Generator PLL
- 600MHz General Purpose Clock Multiplier PLL for 180n CMOS
- Low Power Clock Multiplier PLL for 40nm TSMC ULP CMOS
- Fractional N Clock PLL
- Frac-N SSCG PLL - TSMC 6FF
- Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions