Frac-N PLL IP for SMIC
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Frac-N PLL IP
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Frac-N PLL IP
for SMIC
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Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply
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PLL - SMIC130nm Eflash
- Input range:6MHz~180MHz
- Output range:25MHz~1.4GHz
- Fractional-N structure, Supports interger-N divider application
- Integer-N divider application(RMS jitter): jitter<2ps@1GHz, <1.5ps@1.4GHz;
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PLL - SMIC 55nm Eflash
- Supports integer-N divider application
- Supports 6MHz to 180MHz input clock frequency range
- output clock range from 25MHz to 1.0GHz
- Integer-N divider application: <1.4ps@1GHz