PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process.
Overview
PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process.
Technical Specifications
Foundry, Node
UMC 65nm
UMC
Pre-Silicon:
65nm
LL
,
65nm
LP
,
65nm
SP
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